The present invention relates in general to substrate manufacturing technologies and in particular to methods and array for creating a mathematical model of a plasma processing system.
In the processing of a substrate, e.g., a semiconductor substrate or a glass panel such as one used in flat panel display manufacturing, plasma is often employed. As part of the processing of a substrate for example, the substrate is divided into a plurality of dies, or rectangular areas, each of which will become an integrated circuit. The substrate is then processed in a series of steps in which materials are selectively removed (etching) and deposited (deposition) in order to form electrical components thereon.
In an exemplary plasma process, a substrate is coated with a thin film of hardened emulsion (i.e., such as a photoresist mask) prior to etching. Areas of the hardened emulsion are then selectively removed, causing components of the underlying layer to become exposed. The substrate is then placed in a plasma processing chamber on a substrate support structure comprising a mono-polar or bi-polar electrode, called a chuck or pedestal. Appropriate etchant source are then flowed into the chamber and struck to form a plasma to etch exposed areas of the substrate.
Referring now to FIG. 1, a simplified diagram of a capacitively coupled plasma processing system is shown. Generally, capacitvely coupled plasma processing systems may be configured with a single or with two separate RF power sources. Source RF, generated by source RF generator 130a, is commonly used to generate the plasma as well as control the plasma density via capacitively coupling. While bias RF, generated by bias RF generator 130b, is commonly used to control the DC bias and the ion bombardment energy. Further coupled to source RF generator 130a and bias RF generator 130b is matching network 138, that attempts to match the impedance of the RF power sources to that of plasma 110, through RF feed 132.
Generally, an appropriate set of gases is flowed into chamber 102 through an inlet in top plate 131 from gas distribution system 122. These plasma processing gases may be subsequently ionized to form a plasma 110, in order to process (e.g., etch or deposition) exposed areas of substrate 114, such as a semiconductor substrate or a glass pane, positioned with edge ring 115 on an electrostatic chuck 116, which also serves as the lower electrode. In addition, liner 117 provides a thermal barrier between the plasma and the plasma processing chamber, as well as helping to optimize plasma 110 on substrate 114.
Gas distribution system 122 is commonly comprised of compressed gas cylinders 124a-f containing plasma processing gases (e.g., C4F8, C4F6, CHF3, CH2F3, CF4, HBr, CH3F, C2F4, N2, O2, Ar, Xe, He, H2, NH3, SF6, BCl3, Cl2, WF6, etc.). Gas cylinders 124a-f may be further protected by an enclosure 128 that provides local exhaust ventilation. Mass flow controllers 126a-f are commonly a self-contained devices (consisting of a transducer, control valve, and control and signal-processing electronics) commonly used in the semiconductor industry to measure and regulate the mass flow of gas to the plasma processing system. Injector 109 introduces plasma processing gases 124 as an aerosol into chamber 102 through shower head 104, which also serves as the upper electrode.
Generally, some type of cooling system is coupled to electrostatic chuck 116 in order to achieve thermal equilibrium once the plasma is ignited. The cooling system itself is usually comprised of a chiller that pumps a coolant through cavities in within the chuck, and helium gas pumped between the chuck and the substrate. In addition to removing the generated heat, the helium gas also allows the cooling system to rapidly control heat dissipation. That is, increasing helium pressure subsequently also increases the heat transfer rate. Most plasma processing systems are also controlled by sophisticated computers comprising operating software programs. In a typical operating environment, manufacturing process parameters (e.g., voltage, gas flow mix, gas flow rate, pressure, etc.) are generally configured for a particular plasma processing system and a specific recipe.
In a common substrate manufacturing method, known as dual damascene, dielectric layers are electrically connected by a conductive plug filling a via hole. Generally, an opening is formed in a dielectric layer, usually lined with a TaN or TiN barrier, and then subsequently filled with a conductive material (e.g., aluminum (Al), copper (Cu), etc.) that allows electrical contact between two sets of conductive patterns. This establishes electrical contact between two active regions on the substrate, such as a source/drain region. Excess conductive material on the surface of the dielectric layer is typically removed by chemical mechanical polishing (CMP). A blanket layer of silicon nitride is then deposited to cap the copper.
However, with these and other plasma processes, it is often difficult to monitor the plasma process, and hence to preclude potential manufacturing defects caused by incorrectly installed, improperly manufactured, or damaged components.
For example, pollutants may be cleaned from the plasma processing system by striking the plasma without the substrate. However, since the electrostatic chuck (chuck) is no longer shielded by the substrate, it is subsequently etched. Eventually, the plasma processing system cannot adequately compensate, and the process recipe's parameters are invalidated. Since it is often impractical to determine when this point is exactly reached, the chuck is generally replaced after a certain amount of operational hours, which in practice is normally only a fraction of its useful life. This can both increase productions costs, since an expensive chuck may be needless replaced, and reduces yield, since the plasma processing system must be taken offline for several hours to replace the chuck.
One solution is to create a simplified empirical model of the plasma processing system in order to sufficiently capture the behavior of the tool. However, creating an empirical model may be problematic. For example, a modified non-operational plasma chamber may be analyzed in order to extract parameters for the simplified empirical. In another technique, the individual components of a plasma processing system may be individually measured using a network analyzer. However, even a loosely correlated (and hence weakly predictive) model is difficult to obtain since repetition of the plasma process itself may effect of the electrical characteristics of plasma processing system components. In addition, the extraction process may be difficult to automate, since the cost of a network analyzer may prohibit its integration into most plasma processing systems. The creation of simplified empirical models may only be done infrequently, and only by trained personnel.
In view of the foregoing, there are desired methods and array for creating a mathematical model of a plasma processing system.